4c981ea6b619 // 1.0 PiB free of 1.0 PiB

c File Name Size Date
parent folder--
zipAna M. Erosa & Laurie J. Hendren - Taming Control Flow_ A Structured Approach to Eliminating Goto Statements/6805392000-01-01 00:00:00
zipAndré Seznec, François Bodin - Skewed-associative caches/18760372000-01-01 00:00:00
zipAndré Tavares, Benoit Boissinot, Fernando Pereira & Fabrice Rastello - LNCS 8409 - Parameterized Construction of Program Representations for Sparse Dataflow Analyses/7593452000-01-01 00:00:00
zipBenjamin Van Roy - A Short Proof of Optimality for the MIN Cache Replacement Algorithm/2702452000-01-01 00:00:00
zipBenoit Boissinot, Alain Darte, Fabrice Rastello, Benoit Dupont de_Dinechin, Christophe Guillon - Revisiting Out-of-SSA Translation for Correctness, Code Quality and Efficiency/7177252000-01-01 00:00:00
zipBenoit Boissinot, Florian Brandner, Alain Darte, Benoît Dupont de Dinechin & Fabrice Rastello - LNCS 7078 - A Non-iterative Data-Flow Algorithm for Computing Liveness Sets in Strict SSA Programs/5611532000-01-01 00:00:00
zipBenoit Boissinot, Philip Brisk, Alain Darte, Fabrice Rastello - SSI Properties Revisited/6490692000-01-01 00:00:00
zipBenoit Boissinot, Sebastian Hack, Daniel Grund, Benoît Dupont de Dinechin, Fabrice Rastello - Fast Liveness Checking for SSA-Form Programs/6453252000-01-01 00:00:00
zipChristian Wimmer & Hanspeter Mössenböck - Optimized Interval Splitting in a Linear Scan Register Allocator/6831432000-01-01 00:00:00
zipChristian Wimmer, Michael Franz - Linear scan register allocation on SSA form/10068682000-01-01 00:00:00
zipFlorent Bouchez & Alain Darte & Fabrice Rastello & Christophe Guillon - Register Allocation_ What does the NP-completeness Proof of Chaitin et al. Really Prove_/5071462000-01-01 00:00:00
zipGeorge Marsaglia - Xorshift RNGs/3325282000-01-01 00:00:00
zipGregory J. Chaitin, Marc A. Auslander, Ashok K. Chandra, John Cocke, Martin E. Hopkins & Peter W. Markstein - Register Allocation via Coloring/12155072000-01-01 00:00:00
zipHanspeter Mössenböck & Michael Pfeiffer - Linear Scan Register Allocation in the Context of SSA Form and Register Constraints/15538332000-01-01 00:00:00
zipJames R. Goodman & Wei-Chung Hsu - Code Scheduling and Register Allocation in Large Basic Blocks/17316102000-01-01 00:00:00
zipJoseph Ravichandran, Jay Lang, Weon Taek Na, Mengjia Yan - PACMAN_ Attacking ARM Pointer Authentication with Speculative Execution/10471282000-01-01 00:00:00
zipL. A. Belady - A study of replacement Algorithms for a virtual-storage computer/23368982000-01-01 00:00:00
zipMassimiliano Poletto, Vivek Sarkar - Linear Scan Register Allocation/4585422000-01-01 00:00:00
zipMatthias Braun & Sebastian Hack - Register Spilling and Live-Range Splitting for SSA-Form Programs/5107812000-01-01 00:00:00
zipMatthias Braun, Christoph Mallon & Sebastian Hack - LNCS 6011 - Preference-Guided Register Assignment/5061472000-01-01 00:00:00
zipMatthias Braun, Sebastian Buchwald, Sebastian Hack, Roland Leißa, Christoph Mallon & Andreas Zwinkau - LNCS 7791 - Simple and Efficient Construction of Static Single Assignment Form/5723132000-01-01 00:00:00
zipOmri Traub & Glenn Holloway & Michael D. Smith - Quality and speed in linear-scan register allocation/3333862000-01-01 00:00:00
zipPhilip Brisk & Foad Dabiri & Roozbeh Jafari & Majid Sarrafzadeh - Optimal Register Sharing for High-Level Synthesis of SSA Form Programs/6926592000-01-01 00:00:00
zipPreston Briggs - Register Allocation via Graph Coloring/14078032000-01-01 00:00:00
zipPreston Briggs, Keith D. Cooper & Linda Torczon - Improvements to graph coloring register allocation/23134662000-01-01 00:00:00
zipPreston Briggs, Keith D. Cooper, Linda Torczon - Rematerialization/16569942000-01-01 00:00:00
zipQuentin Colombet, Benoit Boissinot, Philip Brisk, Sebastian Hack, Fabrice Rastello - Graph-coloring and treescan register allocation using repairing/11045202000-01-01 00:00:00
zipRoberto Castaneda Lozano - Constraint-Based Register Allocation and Instruction Scheduling/9031752000-01-01 00:00:00
zipRune Nordvik & Henry Georges & Fergus Toolan & Stefan Axelsson - Reverse engineering of ReFS/93711132000-01-01 00:00:00
zipSebastian Hack, Daniel Grund & Gerhard Goos - LNCS 3923 - Register Allocation for Programs in SSA-Form/6362502000-01-01 00:00:00
zipSherif Abdalazim, Nils Asmussen - Porting Musl to the M3 Micro Kernel/1434742000-01-01 00:00:00
zipUnknown - Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors/11602972000-01-01 00:00:00
zipUnknown - M1 Exploration v0.70/360383142000-01-01 00:00:00
zipVugranam C. Sreedhar, Roy Dz-Ching Ju, David M. Gillies & Vatsa Santhanam - Translating Out of Static Single Assignment Form/4338322000-01-01 00:00:00
zipXinxin Mei, Xiaowen Chu - Dissecting GPU Memory Hierarchy through Microbenchmarking/13198082000-01-01 00:00:00
zipZhe Jia & Marcon Maggioni & Benjamin Staiger & Daniele P. Scarpazza - Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking/15904972000-01-01 00:00:00
ziphexkyz - TSEC_Draft.docx/7299812000-01-01 00:00:00

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